What the Industry Is Signaling

Earlier in January, I had the pleasure of again attending the annual SEMI ISS event to get a pulse on industry happenings. During my time there, a remarkably consistent narrative emerged: The semiconductor industry is entering a structurally different era, defined not by scaling transistors, but by scaling how intelligently we architect, power, connect, and fund the next generation of computing.

While each speaker brought a different perspective, markets, technology, and capital, their messages converged around three core realities:

1. Technology is shifting from 2D scaling to 3D, systems-level engineering
2. AI Is forcing a redefining of “performance”
3. Capital Is rewiring the semiconductor innovation model

These themes are explored below:

1. From 2D to 3D – Lam Research’s Vahid Vahedi and AMD’s Mark Fuselier framed the next chapter of semiconductor innovation as a shift away from pure feature-size shrink and toward system-level engineering, both vertically and laterally. In their view, the industry’s center of gravity is moving to complex 3D architectures across logic, NAND, DRAM, and packaging. This evolution makes deposition and etch-the-core-enabling technologies, with atomic-level precision through ALD and ALE, mission-critical.

In parallel, advanced packaging, chiplets, and hybrid bonding are no longer nice-to-haves. They are central to performance and scaling. As a result, interconnect design, power delivery, thermal management, and even optics now sit on equal footing with the transistors themselves.

2. Performance, Redefined – Across analysts, technologists, and investors, AI was described as the dominant force reshaping the industry, but the consensus was not a simplistic call for ever more computing power. What emerged instead was a clearer diagnosis of where AI is putting real stress on the system—hard limits in energy, bandwidth, and architecture that traditional scaling assumptions can no longer outrun. In that world, performance is increasingly judged not by raw FLOPS alone, but by efficiency, measured in FLOPS per watt, per dollar, and even per square foot of data center footprint.

As workloads scale, the industry is also confronting a sobering reality. Moving data often burns more energy than performing the computations, which elevates locality, bringing memory closer to the computation as a primary design principle. Taken together, these pressures make the future of computing less about transistor speed and more about power availability, heat removal, and interconnect efficiency. The mission, then, is being reframed as delivering scalable intelligence.

3. Capitalizing Innovation – From the venture and corporate investment panel, a meaningful shift appeared. The future semiconductor landscape is set to be shaped as much by who funds innovation, and the mechanisms they use to do it, as by who invents the underlying technology. Panelists pointed to a capital market increasingly concentrated around AI, with roughly 70% of venture funding flowing toward AI-aligned bets. Adjacent domains with direct system-level impact (such as advanced packaging, photonics, next-generation computing, new materials, and security) are rising as priority targets.

Corporate venture arms, in particular, are expanding their roles beyond writing checks, functioning as both capital providers and early market validators that can de-risk adoption and accelerate commercialization. In turn, capital deployment is trending toward deep tech that is relevant at the system level, rather than isolated component innovation, which raises the bar for startups.

That means that it’s no longer enough to clear technical risk alone. Young companies are now expected to demonstrate supply chain readiness, manufacturability, and ecosystem fit early.

Ultimately, SEMI ISS painted a picture of an industry moving into a new governing logic, where Moore’s Law no longer defines leadership by default. Shrinking transistors still matters, but it is no longer the main scoreboard.

First, competition is shifting from node-centric to system-centric. The defining battles of the next decade will be won through system architecture and integration, not the smallest feature size. Advantage increasingly comes from interconnect strategy, power delivery, thermal management, packaging, and software/hardware co-design, which is why the leaders will be the companies that can architect the most energy-efficient, scalable platforms.

Second, energy (not simply compute power) is becoming the primary constraint on growth. AI is not gated by how many FLOPS can be built as much as by how much power can be delivered, how efficiently data can move, and how effectively heat can be removed. That reframes performance around efficiency, and turns data movement, power, thermals, and interconnect into strategic technologies that determine whether systems can scale.

Third, innovation is becoming ecosystem-driven rather than company-driven. The complexity of future platforms spans materials, tools, packaging, software, capital, and manufacturing at a depth no single firm can optimize alone. Open standards, aligned roadmaps, co-development models, corporate venture participation, and public-private funding will increasingly determine speed-to-scale; fragmented approaches will slow adoption even when the underlying technology is strong.

Put simply, if Moore’s Law defined the last era as a race to smaller and faster, SEMI ISS suggests the next era will be defined by system architecture, energy efficiency, and ecosystem orchestration … a shift from ‘fast silicon’ to ‘scalable intelligence.’

For Acara, that shift is a talent story as much as a technology story. Companies building 3D architectures, advanced packaging, next-gen interconnects, power delivery systems, and AI-optimized compute platforms need cross-disciplinary teams that can design, integrate, and industrialize system-level innovation. Acara helps semiconductor organizations find and retain the specialized talent required to compete in this post-node, post-Moore’s-Law semiconductor world.